SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THEREOF

The present invention relates to a semiconductor memory device and an operating method for the same and more particularly, to a semiconductor memory device comprising memory cells and an operating method for the same. A semiconductor memory device according to an embodiment of the present invention comprises: a memory cell array having a plurality of cell transistors; and at least one page buffer for detecting voltage of a sensing node connected to a selected bit line of the memory cell array through a bit line selection transistor to check a program state of a selected cell transistor, wherein the voltage of the selected bit line is maintained constant during the check, regardless of the program state of the selected cell transistor. According to the embodiment of the present invention, the operational characteristics of the semiconductor memory device can be improved. [Reference numerals] (310) Memory cell array; (322) Page buffer; (324) I/O circuit; (326) Column decoder; (328) Voltage generator; (330) Control logic