SEMICONDUCTOR MEMORY APPARATUS

A semiconductor memory apparatus of the present invention comprises: a resistive memory cell connected between a bit line and a bit line bar; a control part for connecting the bit line to a first node, in response to a first sense amplifier enable signal and a second sense amplifier enable signal, a...

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Bibliographische Detailangaben

1. Verfasser:	RHO, KWANG MYOUNG
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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