Semiconductor memory device and method of operating the same
PURPOSE: A semiconductor memory device and an operating method thereof are provided to reduce power consumption by preventing power from being supplied to latch circuits without data retention in a standby mode. CONSTITUTION: A page buffer(120) includes two or more latch circuits. A power terminal o...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng ; kor |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE: A semiconductor memory device and an operating method thereof are provided to reduce power consumption by preventing power from being supplied to latch circuits without data retention in a standby mode. CONSTITUTION: A page buffer(120) includes two or more latch circuits. A power terminal of one latch circuit is connected to an output terminal of a power supply unit. A power terminal of the other latch circuit is connected to a power line. A switching device is connected between the power line and the output terminal of the power supply unit and is turned on according to a standby mode signal. A control logic(150) generates a standby mode signal according to an operation mode. |
---|