Semiconductor memory device performing multi-cycle self refresh and method of verifying the same

PURPOSE: A semiconductor memory device and a verifying method thereof are provided to reduce power consumption of a memory device by easily detecting defects in a multi-cycle self refresh operation. CONSTITUTION: A memory cell array(190) includes first cells and second cells. A tag information regis...

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Bibliographische Detailangaben
Hauptverfasser: SHIM, BO IL, PARK, SANG WON
Format: Patent
Sprache:eng ; kor
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Zusammenfassung:PURPOSE: A semiconductor memory device and a verifying method thereof are provided to reduce power consumption of a memory device by easily detecting defects in a multi-cycle self refresh operation. CONSTITUTION: A memory cell array(190) includes first cells and second cells. A tag information register(210) stores refresh cycle information abut each word line connected to the first cells and the second cells. A refresh control circuit(300) generates a refresh enable signal and a refresh address by referring to refresh cycle information stored in the tag information register. A DQ pin connects data stored in the memory cell array to the outside. A refresh address and a refresh enable signal are transmitted to the outside through the DQ pin.