SEMICONDUCTOR DEVICE, LOADING CAPACITANCE CALIBRATION METHOD USING THE SAME, AND SYSTEM THEREOF

PURPOSE: A semiconductor apparatus, a semiconductor system including the same, and a loading capacitance control method are provided to control loading capacitance of a complementary bit line, thereby reducing detection loss of a bit line detection amplifier. CONSTITUTION: A bit line detection ampli...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KANG, SANG SEOK, LIM, JONG HYOUNG, KWON, HYUNG SHIN
Format: Patent
Sprache:eng ; kor
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Beschreibung
Zusammenfassung:PURPOSE: A semiconductor apparatus, a semiconductor system including the same, and a loading capacitance control method are provided to control loading capacitance of a complementary bit line, thereby reducing detection loss of a bit line detection amplifier. CONSTITUTION: A bit line detection amplifier(30) detects and amplifies the voltage difference between a bit line and a complementary bit line. A capacitance control circuit(100) controls loading capacitance of the complementary bit line in response to a plurality of control signals. The capacitance control circuit comprises a plurality of control blocks which is respectively connected between the complementary bit line and ground. Each capacitance of the control blocks is controlled based on each control signal. The capacitance control circuit comprises a plurality of capacitors and a plurality of switches.