WAFER LEVEL SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF
PURPOSE: A wafer level semiconductor package and a manufacturing method thereof are provided to prevent an exfoliation phenomenon and cracks generated on a junction part between different materials of a semiconductor package, thereby improving reliability of the semiconductor package. CONSTITUTION:...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A wafer level semiconductor package and a manufacturing method thereof are provided to prevent an exfoliation phenomenon and cracks generated on a junction part between different materials of a semiconductor package, thereby improving reliability of the semiconductor package. CONSTITUTION: A first semiconductor chip(110) and second semiconductor chip(210) are connected to each other by a bump(150) in a face-to-face type. A first dielectric layer(120) and second dielectric layer(140) are arranged on the upper surface of the first semiconductor chip. A first redistribution conductive layer(130) is arranged between the first dielectric layer and second dielectric layer. A molding part(300) is arranged between the first semiconductor chip and second semiconductor chip. A third dielectric layer(220) and fourth dielectric layer(240) are arranged on the surface of the molding part. |
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