ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME

PURPOSE: An array substrate and a method of fabricating the same are provided to improve productivity by reducing the thickness of an oxide semiconductor layer to reduce deposition time. CONSTITUTION: A gate electrode(108) is formed in a switching region(TrA). A gate insulating layer(112) is formed...

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Bibliographische Detailangaben
Hauptverfasser: RYOO, CHANG IL, KIM, YONG YUB
Format: Patent
Sprache:eng ; kor
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Beschreibung
Zusammenfassung:PURPOSE: An array substrate and a method of fabricating the same are provided to improve productivity by reducing the thickness of an oxide semiconductor layer to reduce deposition time. CONSTITUTION: A gate electrode(108) is formed in a switching region(TrA). A gate insulating layer(112) is formed in a gate wiring and the gate electrode. An oxide semiconductor layer(119) with first thickness is formed on the gate insulating layer. An assistant pattern is formed on the oxide semiconductor layer and has second thickness. A source electrode(135) and a drain electrode(138) are formed on the assistant pattern.