VERTICAL DIODE BASED MEMORY CELLS HAVING A LOWERED PROGRAMMING VOLTAGE AND METHODS OF FORMING THE SAME

In a first aspect, a method for forming a non-volatile memory cell is provided. The method includes forming a metal-insulator-metal (MIM) antifuse stack including a first metal layer; a silicon dioxide, oxynitride or silicon nitride antifuse layer formed above the first metal layer; and a second met...

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Bibliographische Detailangaben
Hauptverfasser: KUMAR TANMAY, HERNER S. BRAD
Format: Patent
Sprache:eng ; kor
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Beschreibung
Zusammenfassung:In a first aspect, a method for forming a non-volatile memory cell is provided. The method includes forming a metal-insulator-metal (MIM) antifuse stack including a first metal layer; a silicon dioxide, oxynitride or silicon nitride antifuse layer formed above the first metal layer; and a second metal layer formed above the antifuse layer. The method also includes forming a contiguous p-i-n diode above the MIM stack, the contiguous p-i-n diode comprising deposited semiconductor material; forming a layer of a suicide, silicide-germanide, or germanide in contact with the deposited semiconductor material; and crystallizing the deposited semiconductor material in contact with the layer of suicide, silicide-germanide, or germanide. The memory cell comprises the contiguous p-i-n diode and the MIM stack. Other aspects are provided.