MEMORY SYSTEM AND BLOCK MERGE METHODS THEREOF

MEMORY SYSTEM AND BLOCK MERGE METHODS THEREOF

A memory system and a block merge methods thereof are provided to control the number of memory blocks that are supposed to be merged by estimating the number of necessary log blocks. A flash memory(330) includes plural data blocks(331), plural log blocks(332) and plural free blocks(333) that are con...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: CHO, YUL WON
Format: Patent
Sprache:eng ; kor
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A memory system and a block merge methods thereof are provided to control the number of memory blocks that are supposed to be merged by estimating the number of necessary log blocks. A flash memory(330) includes plural data blocks(331), plural log blocks(332) and plural free blocks(333) that are converted into the data block or the log blocks. A memory system(300) converts the data block or the log block allocated to the data block into the free block through a merging operation for a background section. The memory system includes a flash translation layer(320) that maintains the number of the free blocks as the preset reference number.