METHOD AND APPARATUS FOR PROCESSING WAFER EDGE

A method and apparatus for processing wafer edge is provided to prevent the penetration of chemical through the notch region and protect semiconductor patterns from chemical. The wafer edge processing unit comprises the wafer loading part(101), the notch detection unit(103), and the edge exposure pa...

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Bibliographische Detailangaben
1. Verfasser:	KIM, GWAN SU
Format:	Patent
Sprache:	eng
Schlagworte:	APPARATUS SPECIALLY ADAPTED THEREFOR BASIC ELECTRIC ELEMENTS CINEMATOGRAPHY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROGRAPHY HOLOGRAPHY MATERIALS THEREFOR ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	A method and apparatus for processing wafer edge is provided to prevent the penetration of chemical through the notch region and protect semiconductor patterns from chemical. The wafer edge processing unit comprises the wafer loading part(101), the notch detection unit(103), and the edge exposure part(105) and the edge developing part(107). The semiconductor wafer is settled in the wafer loading part. The semiconductor wafer has the photoresist film. The notch detection unit detects the notch region of the semiconductor wafer and arranges the notch region of the semiconductor wafer in the edge exposure part. The edge exposure part exposes the light on the photoresist film corresponding to the notch region of the semiconductor wafer. The edge region corresponds to the first width which extends from the edge of the semiconductor substrate. The open area corresponds to the second width which faces the central zone of the semiconductor substrate from the notch region of the semiconductor substrate and extended. The edge developing part develops the photoresist film and exposes the edge region and the semiconductor substrate. The wafer edge processing unit exposes the edge region and open area of the semiconductor substrate.