METHOD OF FORMING A DUAL DAMASCENE PATTERN IN SEMICONDUCTOR DEVICE

A method for forming a dual damascene pattern of a semiconductor device is provided to minimize a sputtering etching property by minimizing energetic ion energy in forming a dual damascene pattern. An interlayer insulation film(102) is formed on a semiconductor substrate(100). A contact hole(106) is...

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1. Verfasser:	AHN, MYUNG KYU
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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