SEMICONDUCTOR DEVICE

A semiconductor device is provided to reduce the chip area by forming commonly writing/erasing elements and reading elements on the common active region. The first memory cell(MC1) and the second memory cell(MC2) are formed in the main surface of the substrate(1S). The active areas are electrically separated from the main surface of the substrate. The capacitive element of the first memory cell is arranged in the first active region(L1). The capacitive element of the second memory cell is arranged in the fourth active area(L4). The commonly writing/erasing elements for the first memory and the commonly writing/erasing elements for the second memory are arranged in the second active area(L2). The reading elements for the first memory and the reading elements for the second memory are arranged in the third active area(L3).