SEMICONDUCTOR PATTERN AND METHODS OF ARRAYING THE SAME
A semiconductor pattern and arrangement method are provided to optimize the arrangement of a plurality of semiconductor pattern and to minimize the misalignment of the contact pattern and semiconductor pattern. A plurality of semiconductor patterns is formed beneath or on the plurality of contact pa...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A semiconductor pattern and arrangement method are provided to optimize the arrangement of a plurality of semiconductor pattern and to minimize the misalignment of the contact pattern and semiconductor pattern. A plurality of semiconductor patterns is formed beneath or on the plurality of contact pattern. the semiconductor pattern is repeatedly arranged by the shot unit area. The unit area is made of x and y-coordinates. The angle between the major axis of each semiconductor pattern and the X-axis is 0°< theta2 < 90° in the right direction region (I) among the shot unit area and left direction region (III). The angle of the major axis of each semiconductor pattern is 90°< theta3 < 180° in the left direction region (II) among the shot unit area and left direction region(IV). |
---|