METHOD FOR MANUFACTURING INTER LAYER DIELECTRIC IN SEMICONDUCTOR DEVICE

A method for fabricating an interlayer dielectric of a semiconductor device is provided to reduce the electrical loss of the semiconductor device by maintaining a ration of boron and phosphorous. A gate stack(210) is formed on a semiconductor substrate(200). A diffusion barrier(212) is formed on the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: RHO, DAE HO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A method for fabricating an interlayer dielectric of a semiconductor device is provided to reduce the electrical loss of the semiconductor device by maintaining a ration of boron and phosphorous. A gate stack(210) is formed on a semiconductor substrate(200). A diffusion barrier(212) is formed on the semiconductor substrate on which the gate stack is formed. A first floating layer is formed on the diffusion barrier. A second floating layer is formed to bury the first floating layer and the gate stack. A thermal process is performed on the second floating layer. The diffusion barrier is a silicon oxide layer containing boron. The first floating layer is a silicon oxide layer containing phosphorous. The second floating layer is a BPSG(Boro-Phospho-Silicate Glass) layer. The process for forming the diffusion layer is performed under the pressure of 500 to 700 Torr.