PRINTED WIRING BOARD WITH BULLT-IN SEMICONDUCTOR ELEMENT, AND PROCESS FOR PRODUCING THE SAME
This invention provides a printed wiring board with a built-in semiconductor element that has excellent adhesion to an overlying wiring board without being adversely influenced by unsatisfactory sealing material packing or excessive sealing material packing. The printed wiring board with a built-in...
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| creator | YOSHINO YUTAKA TODA NAOKI ARAKI MAKOTO KADONO SHINJI SHIRAI TAKAHIRO GOTO MASAKATSU ENOMOTO MINORU KAWAMOTO MINEO |
| description | This invention provides a printed wiring board with a built-in semiconductor element that has excellent adhesion to an overlying wiring board without being adversely influenced by unsatisfactory sealing material packing or excessive sealing material packing. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, upper surface, or side surface thereof is covered with an insulating film, and an insulating layer is provided on the side and upper part of the semiconductor element. There is also provided a process for producing a printed wiring board with a built-in semiconductor element, comprising the steps of mounting a semiconductor element on a base substrate and covering at least the lower surface, upper surface or side surface of the semiconductor element with an insulating film, disposing and stacking a semicured insulating sheet on the side of the semiconductor element, and disposing and stacking a semicured insulating sheet on the upper part of the semiconductor element. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20080081220A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20080081220A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20080081220A3</originalsourceid><addsrcrecordid>eNrjZIgJCPL0C3F1UQj3BDLcFZz8HYNAnBAPBadQH58QXU8_hWBXX09nfz-XUOcQ_yAFVx9XX1e_EB0FRz8XhYAgf2fX4GAFN6AEkA1UAjIkxMNVIdjR15WHgTUtMac4lRdKczMou7mGOHvophbkx6cWFyQmp-allsR7BxkZGFgAkaGRkYGjMXGqAHQlMv4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED WIRING BOARD WITH BULLT-IN SEMICONDUCTOR ELEMENT, AND PROCESS FOR PRODUCING THE SAME</title><source>esp@cenet</source><creator>YOSHINO YUTAKA ; TODA NAOKI ; ARAKI MAKOTO ; KADONO SHINJI ; SHIRAI TAKAHIRO ; GOTO MASAKATSU ; ENOMOTO MINORU ; KAWAMOTO MINEO</creator><creatorcontrib>YOSHINO YUTAKA ; TODA NAOKI ; ARAKI MAKOTO ; KADONO SHINJI ; SHIRAI TAKAHIRO ; GOTO MASAKATSU ; ENOMOTO MINORU ; KAWAMOTO MINEO</creatorcontrib><description>This invention provides a printed wiring board with a built-in semiconductor element that has excellent adhesion to an overlying wiring board without being adversely influenced by unsatisfactory sealing material packing or excessive sealing material packing. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, upper surface, or side surface thereof is covered with an insulating film, and an insulating layer is provided on the side and upper part of the semiconductor element. There is also provided a process for producing a printed wiring board with a built-in semiconductor element, comprising the steps of mounting a semiconductor element on a base substrate and covering at least the lower surface, upper surface or side surface of the semiconductor element with an insulating film, disposing and stacking a semicured insulating sheet on the side of the semiconductor element, and disposing and stacking a semicured insulating sheet on the upper part of the semiconductor element.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080909&DB=EPODOC&CC=KR&NR=20080081220A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080909&DB=EPODOC&CC=KR&NR=20080081220A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YOSHINO YUTAKA</creatorcontrib><creatorcontrib>TODA NAOKI</creatorcontrib><creatorcontrib>ARAKI MAKOTO</creatorcontrib><creatorcontrib>KADONO SHINJI</creatorcontrib><creatorcontrib>SHIRAI TAKAHIRO</creatorcontrib><creatorcontrib>GOTO MASAKATSU</creatorcontrib><creatorcontrib>ENOMOTO MINORU</creatorcontrib><creatorcontrib>KAWAMOTO MINEO</creatorcontrib><title>PRINTED WIRING BOARD WITH BULLT-IN SEMICONDUCTOR ELEMENT, AND PROCESS FOR PRODUCING THE SAME</title><description>This invention provides a printed wiring board with a built-in semiconductor element that has excellent adhesion to an overlying wiring board without being adversely influenced by unsatisfactory sealing material packing or excessive sealing material packing. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, upper surface, or side surface thereof is covered with an insulating film, and an insulating layer is provided on the side and upper part of the semiconductor element. There is also provided a process for producing a printed wiring board with a built-in semiconductor element, comprising the steps of mounting a semiconductor element on a base substrate and covering at least the lower surface, upper surface or side surface of the semiconductor element with an insulating film, disposing and stacking a semicured insulating sheet on the side of the semiconductor element, and disposing and stacking a semicured insulating sheet on the upper part of the semiconductor element.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZIgJCPL0C3F1UQj3BDLcFZz8HYNAnBAPBadQH58QXU8_hWBXX09nfz-XUOcQ_yAFVx9XX1e_EB0FRz8XhYAgf2fX4GAFN6AEkA1UAjIkxMNVIdjR15WHgTUtMac4lRdKczMou7mGOHvophbkx6cWFyQmp-allsR7BxkZGFgAkaGRkYGjMXGqAHQlMv4</recordid><startdate>20080909</startdate><enddate>20080909</enddate><creator>YOSHINO YUTAKA</creator><creator>TODA NAOKI</creator><creator>ARAKI MAKOTO</creator><creator>KADONO SHINJI</creator><creator>SHIRAI TAKAHIRO</creator><creator>GOTO MASAKATSU</creator><creator>ENOMOTO MINORU</creator><creator>KAWAMOTO MINEO</creator><scope>EVB</scope></search><sort><creationdate>20080909</creationdate><title>PRINTED WIRING BOARD WITH BULLT-IN SEMICONDUCTOR ELEMENT, AND PROCESS FOR PRODUCING THE SAME</title><author>YOSHINO YUTAKA ; TODA NAOKI ; ARAKI MAKOTO ; KADONO SHINJI ; SHIRAI TAKAHIRO ; GOTO MASAKATSU ; ENOMOTO MINORU ; KAWAMOTO MINEO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20080081220A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YOSHINO YUTAKA</creatorcontrib><creatorcontrib>TODA NAOKI</creatorcontrib><creatorcontrib>ARAKI MAKOTO</creatorcontrib><creatorcontrib>KADONO SHINJI</creatorcontrib><creatorcontrib>SHIRAI TAKAHIRO</creatorcontrib><creatorcontrib>GOTO MASAKATSU</creatorcontrib><creatorcontrib>ENOMOTO MINORU</creatorcontrib><creatorcontrib>KAWAMOTO MINEO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YOSHINO YUTAKA</au><au>TODA NAOKI</au><au>ARAKI MAKOTO</au><au>KADONO SHINJI</au><au>SHIRAI TAKAHIRO</au><au>GOTO MASAKATSU</au><au>ENOMOTO MINORU</au><au>KAWAMOTO MINEO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED WIRING BOARD WITH BULLT-IN SEMICONDUCTOR ELEMENT, AND PROCESS FOR PRODUCING THE SAME</title><date>2008-09-09</date><risdate>2008</risdate><abstract>This invention provides a printed wiring board with a built-in semiconductor element that has excellent adhesion to an overlying wiring board without being adversely influenced by unsatisfactory sealing material packing or excessive sealing material packing. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, upper surface, or side surface thereof is covered with an insulating film, and an insulating layer is provided on the side and upper part of the semiconductor element. There is also provided a process for producing a printed wiring board with a built-in semiconductor element, comprising the steps of mounting a semiconductor element on a base substrate and covering at least the lower surface, upper surface or side surface of the semiconductor element with an insulating film, disposing and stacking a semicured insulating sheet on the side of the semiconductor element, and disposing and stacking a semicured insulating sheet on the upper part of the semiconductor element.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | PRINTED WIRING BOARD WITH BULLT-IN SEMICONDUCTOR ELEMENT, AND PROCESS FOR PRODUCING THE SAME |
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