A PROCESS FOR WAFER BONDING

A process for wafer bonding is provided to enhance wafer bonding characteristics by improving reduction of bonding quality caused by air bubbles and delaminations. An upper metal layer is formed on a first substrate(104). The upper metal layer includes a plurality of interconnect features and a firs...

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Bibliographische Detailangaben
Hauptverfasser:	LIANG KAI CHIH, SHIAU GWO YUH, CHANG FA YUAN, LAI TSUNG MU, CHANG CHU WEI, SHEN NICK Y.M, PAI CHING CHUNG, HO CHIN HSIUNG, TSAI CHIA SHIUNG, WU HUA SHU, LIU MING CHYI, HSIEH YUAN CHIH
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	A process for wafer bonding is provided to enhance wafer bonding characteristics by improving reduction of bonding quality caused by air bubbles and delaminations. An upper metal layer is formed on a first substrate(104). The upper metal layer includes a plurality of interconnect features and a first dummy feature. A first dielectric layer is etched in a target region aligned vertically to the interconnect features and the first dummy feature of the upper metal layer(108). A CMP process is performed on the etched first dielectric layer(110). The first substrate is bonded with a second substrate after the CMP process is performed on the etched first dielectric layer(114).