UNDERSAMPLED CLOCK SIGNAL SYNCHRONIZATION AID DEVICE AND DEVICE FOR RECONSTRUCTING UNDERSAMPLED CLOCK SIGNALS, FOR A PACKET-SWITCHED NETWORK

An undersampled clock signal synchronization aid device and a device for reconstructing undersampled clock signals for a packet-switched network are provided to allow the frequency division of a first order clock signal existing at a remote control device connected to the packet switched network. An undersampled clock signal synchronization aid device includes a counter(C1) and a control unit(MC1). The counter is arranged to increase a value by one unit for each of first order clock pulses and reset the value for each of M number first order clock pulses. The control unit generates at least one first bit for each of the first order clock pulses. The control unit is arranged to generate a set of second bits representative of a value of the M related to the first bit for each of the first order clock pulses. The first bit and the related set are included in the same one packet so as to be transmitted at the same time by a transmission communication device(EQ1).