METHOD OF FORMING A PROGRAMMABLE VOLTAGE REGULATOR AND STRUCTURE THEREFOR
A programmable voltage regulator and a method for forming the same are provided to reduce the number of I/O pins by using the same inputs for two different functions during two different operation modes. A programmable voltage regulator includes a non-volatile memory element(60), and first and secon...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A programmable voltage regulator and a method for forming the same are provided to reduce the number of I/O pins by using the same inputs for two different functions during two different operation modes. A programmable voltage regulator includes a non-volatile memory element(60), and first and second inputs. During a first operation mode of the voltage regulator, the non-volatile memory element stores data for controlling the operation of the voltage regulator. During a second operation mode of the voltage regulator, the non-volatile memory element receives the data. During the first operation mode of the voltage regulator, the first input receives a first signal for controlling the operation of the voltage regulator. During the second operation mode of the voltage regulator, the first input receives the data from the outside to the voltage regulator. During the first operation mode of the voltage regulator, the second input receives a second signal for controlling the operation of the voltage regulator. During the second operation mode of the voltage regulator, the second input receives a third signal for storing the data to the voltage regulator. |
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