NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

A nonvolatile semiconductor memory device is provided to perform permutation control accurately, by reading failed address data stored in a redundancy memory cell surely without an error. A memory cell array is arranged with electrically erasable and programmable nonvolatile memory cells. A redundan...

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Bibliographische Detailangaben
Hauptverfasser: KASHIWAGI JIN, UMEZAWA AKIRA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A nonvolatile semiconductor memory device is provided to perform permutation control accurately, by reading failed address data stored in a redundancy memory cell surely without an error. A memory cell array is arranged with electrically erasable and programmable nonvolatile memory cells. A redundancy memory cell stores address data of a defective cell in the memory cell array by having different threshold voltages according to memory data. A first decoder circuit is operated by receiving a first driving voltage and transmits a control signal to the redundancy memory cell. A latch circuit stores address data of the defective cell read out from the redundancy memory cell. A nonvolatile semiconductor memory device comprises a dummy memory cell(186) having a threshold voltage corresponding to the redundancy memory cell, a second decoder circuit transmitting a control signal to the dummy memory cell as being operated by receiving a second driving voltage corresponding to the first driving voltage, and a comparison circuit allowing to start redundancy permutation control on the basis of the result of comparing data to be read from the dummy memory cell with data read-out from the dummy memory cell actually.