FABRICATION OF A FERROMAGNETIC INDUCTOR CORE AND CAPACITOR ELECTRODE IN A SINGLE PHOTO MASK STEP
An integrated circuit capacitor having a bottom plate (50a), a dielectric layer (250'), and a ferromagnetic top plate (20a). Also, a method of manufacturing an integrated circuit on a semiconductor wafer. The method comprising forming a bottom plate of a capacitor (50a) and a bottom portion of...
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creator | BRENNAN KENNETH D RAO SATYAVOLU S. PAPA |
description | An integrated circuit capacitor having a bottom plate (50a), a dielectric layer (250'), and a ferromagnetic top plate (20a). Also, a method of manufacturing an integrated circuit on a semiconductor wafer. The method comprising forming a bottom plate of a capacitor (50a) and a bottom portion of an induction coil (50a), forming an etch stop layer (250'), forming a ferromagnetic capacitor top plate (20a) and a ferromagnetic core (20b), forming a top portion of the induction coil (50b) plus vias (50c) that couple the top portion of the induction coil (50b) to the bottom portion of the induction coil (50c). |
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The method comprising forming a bottom plate of a capacitor (50a) and a bottom portion of an induction coil (50a), forming an etch stop layer (250'), forming a ferromagnetic capacitor top plate (20a) and a ferromagnetic core (20b), forming a top portion of the induction coil (50b) plus vias (50c) that couple the top portion of the induction coil (50b) to the bottom portion of the induction coil (50c).</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070910&DB=EPODOC&CC=KR&NR=20070091326A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070910&DB=EPODOC&CC=KR&NR=20070091326A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BRENNAN KENNETH D</creatorcontrib><creatorcontrib>RAO SATYAVOLU S. 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PAPA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FABRICATION OF A FERROMAGNETIC INDUCTOR CORE AND CAPACITOR ELECTRODE IN A SINGLE PHOTO MASK STEP</title><date>2007-09-10</date><risdate>2007</risdate><abstract>An integrated circuit capacitor having a bottom plate (50a), a dielectric layer (250'), and a ferromagnetic top plate (20a). Also, a method of manufacturing an integrated circuit on a semiconductor wafer. The method comprising forming a bottom plate of a capacitor (50a) and a bottom portion of an induction coil (50a), forming an etch stop layer (250'), forming a ferromagnetic capacitor top plate (20a) and a ferromagnetic core (20b), forming a top portion of the induction coil (50b) plus vias (50c) that couple the top portion of the induction coil (50b) to the bottom portion of the induction coil (50c).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | FABRICATION OF A FERROMAGNETIC INDUCTOR CORE AND CAPACITOR ELECTRODE IN A SINGLE PHOTO MASK STEP |
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