WORD LINE DRIVER CIRCUIT FOR A STATIC RANDOM ACCESS MEMORY AND METHOD THEREFOR

A static random access memory (14) has a normal mode of operation and a low voltage mode of operation. A memory array (15) includes memory cells (16) coupled to a first power supply node (VDD) for receiving a power supply voltage. A plurality of word line drivers is coupled to word lines of the memory array (15) and to a second power supply node (37). A word line driver voltage reduction circuit (36) has an input coupled to the first power supply node (VDD) and an output coupled to the second power supply node (37) for reducing a voltage on the output in relation to a voltage on the input in response to a low power supply voltage signal, and thus improving a static noise margin of the memory cells (16).