SILICIDING SPACER IN INTEGRATED CIRCUIT TECHNOLOGY

A method [900] of forming an integrated circuit [100] and a structure therefore is provided. A gate dielectric [104]is formed on a semiconductor substrate [102], and a gate [106] is formed over the gate dielectric [104]. Shallow source/drain junctions [304,306] are formed in the semiconductor substrate [102]. A sidewall spacer [402] is formed around the gate [106]. Deep source/drain junctions [504,506] are formed in the semiconductor substrate [102] using the sidewall spacer [402]. A siliciding spacer [610] is formed over the sidewall spacer [402] after forming the shallow and deep source/drain junctions [504,506]. A silicide [604] [606] is formed on the deep source/drain junctions [504,506] adjacent the siliciding spacer [610], and a dielectric layer [702] is deposited above the semiconductor substrate [102]. Contacts are then formed in the dielectric layer [702] to the silicide [604][606].