METHOD FOR EXECUTING INSTRUCTIONS BY MICROPROCESSOR, COMPILER, AND MULTIPROCESSOR DATA PROCESSING SYSTEM USING CACHE MEMORY SUBSYSTEM
PURPOSE: A method for executing instructions by a microprocessor, a compiler, and a multiprocessor data processing system using a cache memory subsystem are provided to enable an OS(Operating System), a programmer, and/or a processor to control/identify/invalidate a selected cache line without occur...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A method for executing instructions by a microprocessor, a compiler, and a multiprocessor data processing system using a cache memory subsystem are provided to enable an OS(Operating System), a programmer, and/or a processor to control/identify/invalidate a selected cache line without occurring error for potential timing and coherency generated in a multiprocessor environment. CONSTITUTION: An address is judged by a microprocessor. It is judged that a cache block matched with the address is present in the cache memory unit localized to the microprocessor(134). Responding that the cache block matched with the address is present, the cache block in a local cache memory unit is invalidated(140). Responding that the cache block matched with the address is present in a remote cache memory unit, the cache block matched with the address is kept in a valid state. |
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