THIN FILM TRANSISTOR ARRAY SUBSTRATE FABRICATION METHOD FOR REDUCING A FABRICATION COST WHILE OBTAINING RELIABILITY

PURPOSE: A TFT array substrate is provided to further simplify a substrate structure and a fabrication process by adopting the third mask process, and to protect a TFT by using a pattern spacer. CONSTITUTION: Gate lines have a double layer structure. Gate insulating patterns(62) are formed along the...

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Bibliographische Detailangaben
Hauptverfasser: CHO, HEUNG RYEOL, JANG, YUN GYEONG
Format: Patent
Sprache:eng ; kor
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Zusammenfassung:PURPOSE: A TFT array substrate is provided to further simplify a substrate structure and a fabrication process by adopting the third mask process, and to protect a TFT by using a pattern spacer. CONSTITUTION: Gate lines have a double layer structure. Gate insulating patterns(62) are formed along the gate lines and gate electrodes(54). Semiconductor patterns(68) are overlapped with the gate electrodes(54) at an interval of the gate insulating patterns(62). Data lines(74) cross the gate lines at an interval of the gate insulating patterns(62). A source electrode(76) is connected to the data lines(74). A drain electrode(78) is opposite to the source electrode(76) at an interval of the semiconductor patterns(68). A pixel electrode(60) is formed in a cell area disposed by crossing the gate lines with the data lines(74).