Method for manufacturing a semiconductor device

PURPOSE: A method for manufacturing a semiconductor device is provided to restrain short channel effect by forming a shallow junction region having high doping concentration using mixed ion implantation and heat treatment. CONSTITUTION: A gate electrode(112) is formed on a semiconductor substrate(102). An LDD(Lightly Doped Drain) region made of the first and second junction region(116,118) is formed at both sides of the gate electrode in the substrate by sequentially implanting Sb ions and As ions into the substrate. RTP(Rapid Thermal Processing) is carried out on the resultant structure at the temperature of 800-1000 °C under nitrogen gas atmosphere for a short time. A spacer(124) is formed at both sidewalls of the gate electrode. The third junction region(128) is formed at both sides of the gate electrode in the substrate by carrying out a high concentration ion implantation on the resultant structure. A metal layer is formed on the resultant structure. A heat treatment is carried out on the resultant structure for transforming the metal layer into a metal silicide layer(132). 본 발명은 반도체 소자의 제조방법에 관한 것으로, 본 발명에서는 CMOSFET 소자 중, 특히 NMOSFET 소자의 특성 개선을 위하여 소오스 및 드레인 접합영역에 덩어리가 큰 도펀트를 혼합이온주입함과 아울러 추가로 최소한의 유지시간을 갖는 열처리공정을 실시함으로써 도핑농도가 매우 높은 얕은 접합영역을 형성할 수 있으며, 이에 따라 단채널 효과를 억제시킬 수 있는 반도체 소자의 제조방법을 개시한다.