Apparatus and method for generating clock signal in optical recording system
PURPOSE: An apparatus for generating clock signals in an optical recording system, and a method therefor are provided to simply realize routing pass without a limitation on a range of dynamic frequency while minimizing the influence of jitter, thereby reducing a burden in hardware. CONSTITUTION: A P...
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description | PURPOSE: An apparatus for generating clock signals in an optical recording system, and a method therefor are provided to simply realize routing pass without a limitation on a range of dynamic frequency while minimizing the influence of jitter, thereby reducing a burden in hardware. CONSTITUTION: A PLL(Phase Locked Loop) part(100) inputs a reference signal for generating a comparison signal locked in the reference signal, and generates n oscillating signals having a predetermined phase difference between two adjacent signals. A DLL(Delay Locked Loop) part(200) selects two adjacent signals from the n oscillating signals in response to a selection signal, and executes phase interpolation between the selected two oscillating signals in response to a current control signal for outputting the phase-interpolated signals as clock signals.
광 기록 시스템에서 클럭신호 발생장치 및 그 방법이 개시된다. 본 발명에 따른 클럭신호 발생장치는 기준신호를 입력하여, 기준신호에 록킹되는 비교신호를 생성하고, 비교신호를 기준으로 인접한 두 신호간에 소정의 위상차를 갖는 n개의 발진신호를 생성하여 출력하는 PLL부 및 PLL부에서 출력되는 n개의 발진신호들 중, 선택신호에 응답하여 위상이 근접한 두 개의 발진신호를 선택하고, 전류제어신호에 응답하여 선택된 두 발진신호간의 위상보간을 수행하여 위상 보간된 신호를 클럭신호로서 출력하는 DLL부를 포함하는 것을 특징으로 하며, 지터의 영향을 최소화하면서도 동작주파수 범위의 제한을 받지 않고, 라우팅 패스를 간단히 할 수 있어 하드웨어적 부담을 줄일 수 있다. |
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광 기록 시스템에서 클럭신호 발생장치 및 그 방법이 개시된다. 본 발명에 따른 클럭신호 발생장치는 기준신호를 입력하여, 기준신호에 록킹되는 비교신호를 생성하고, 비교신호를 기준으로 인접한 두 신호간에 소정의 위상차를 갖는 n개의 발진신호를 생성하여 출력하는 PLL부 및 PLL부에서 출력되는 n개의 발진신호들 중, 선택신호에 응답하여 위상이 근접한 두 개의 발진신호를 선택하고, 전류제어신호에 응답하여 선택된 두 발진신호간의 위상보간을 수행하여 위상 보간된 신호를 클럭신호로서 출력하는 DLL부를 포함하는 것을 특징으로 하며, 지터의 영향을 최소화하면서도 동작주파수 범위의 제한을 받지 않고, 라우팅 패스를 간단히 할 수 있어 하드웨어적 부담을 줄일 수 있다.</description><edition>7</edition><language>eng ; kor</language><subject>INFORMATION STORAGE ; INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER ; PHYSICS</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040304&DB=EPODOC&CC=KR&NR=20040018825A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040304&DB=EPODOC&CC=KR&NR=20040018825A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHO, GYEONG SEON</creatorcontrib><title>Apparatus and method for generating clock signal in optical recording system</title><description>PURPOSE: An apparatus for generating clock signals in an optical recording system, and a method therefor are provided to simply realize routing pass without a limitation on a range of dynamic frequency while minimizing the influence of jitter, thereby reducing a burden in hardware. CONSTITUTION: A PLL(Phase Locked Loop) part(100) inputs a reference signal for generating a comparison signal locked in the reference signal, and generates n oscillating signals having a predetermined phase difference between two adjacent signals. A DLL(Delay Locked Loop) part(200) selects two adjacent signals from the n oscillating signals in response to a selection signal, and executes phase interpolation between the selected two oscillating signals in response to a current control signal for outputting the phase-interpolated signals as clock signals.
광 기록 시스템에서 클럭신호 발생장치 및 그 방법이 개시된다. 본 발명에 따른 클럭신호 발생장치는 기준신호를 입력하여, 기준신호에 록킹되는 비교신호를 생성하고, 비교신호를 기준으로 인접한 두 신호간에 소정의 위상차를 갖는 n개의 발진신호를 생성하여 출력하는 PLL부 및 PLL부에서 출력되는 n개의 발진신호들 중, 선택신호에 응답하여 위상이 근접한 두 개의 발진신호를 선택하고, 전류제어신호에 응답하여 선택된 두 발진신호간의 위상보간을 수행하여 위상 보간된 신호를 클럭신호로서 출력하는 DLL부를 포함하는 것을 특징으로 하며, 지터의 영향을 최소화하면서도 동작주파수 범위의 제한을 받지 않고, 라우팅 패스를 간단히 할 수 있어 하드웨어적 부담을 줄일 수 있다.</description><subject>INFORMATION STORAGE</subject><subject>INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPBxLChILEosKS1WSMxLUchNLcnIT1FIyy9SSE_NSwVKZOalKyTn5CdnKxRnpucl5ihk5inkF5RkJgOZRanJ-UUpIBXFlcUlqbk8DKxpiTnFqbxQmptB2c01xNlDN7UgPz61uCAxGWhmSbx3kJGBgYmBgaGFhZGpozFxqgB6-zbK</recordid><startdate>20040304</startdate><enddate>20040304</enddate><creator>CHO, GYEONG SEON</creator><scope>EVB</scope></search><sort><creationdate>20040304</creationdate><title>Apparatus and method for generating clock signal in optical recording system</title><author>CHO, GYEONG SEON</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20040018825A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2004</creationdate><topic>INFORMATION STORAGE</topic><topic>INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHO, GYEONG SEON</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHO, GYEONG SEON</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatus and method for generating clock signal in optical recording system</title><date>2004-03-04</date><risdate>2004</risdate><abstract>PURPOSE: An apparatus for generating clock signals in an optical recording system, and a method therefor are provided to simply realize routing pass without a limitation on a range of dynamic frequency while minimizing the influence of jitter, thereby reducing a burden in hardware. CONSTITUTION: A PLL(Phase Locked Loop) part(100) inputs a reference signal for generating a comparison signal locked in the reference signal, and generates n oscillating signals having a predetermined phase difference between two adjacent signals. A DLL(Delay Locked Loop) part(200) selects two adjacent signals from the n oscillating signals in response to a selection signal, and executes phase interpolation between the selected two oscillating signals in response to a current control signal for outputting the phase-interpolated signals as clock signals.
광 기록 시스템에서 클럭신호 발생장치 및 그 방법이 개시된다. 본 발명에 따른 클럭신호 발생장치는 기준신호를 입력하여, 기준신호에 록킹되는 비교신호를 생성하고, 비교신호를 기준으로 인접한 두 신호간에 소정의 위상차를 갖는 n개의 발진신호를 생성하여 출력하는 PLL부 및 PLL부에서 출력되는 n개의 발진신호들 중, 선택신호에 응답하여 위상이 근접한 두 개의 발진신호를 선택하고, 전류제어신호에 응답하여 선택된 두 발진신호간의 위상보간을 수행하여 위상 보간된 신호를 클럭신호로서 출력하는 DLL부를 포함하는 것을 특징으로 하며, 지터의 영향을 최소화하면서도 동작주파수 범위의 제한을 받지 않고, 라우팅 패스를 간단히 할 수 있어 하드웨어적 부담을 줄일 수 있다.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER PHYSICS |
title | Apparatus and method for generating clock signal in optical recording system |
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