Method for forming the Pad Oxide Layer of Semiconductor Device

PURPOSE: A method for fabricating a pad oxide layer of a semiconductor device is provided to increase uniformity in a silicon wafer and gettering efficiency by using rapid thermal annealing(RTA) equipment instead of a furnace-type heat treatment method. CONSTITUTION: After the pad oxide layer is for...

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1. Verfasser: PI, SEUNG HO
Format: Patent
Sprache:eng ; kor
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Zusammenfassung:PURPOSE: A method for fabricating a pad oxide layer of a semiconductor device is provided to increase uniformity in a silicon wafer and gettering efficiency by using rapid thermal annealing(RTA) equipment instead of a furnace-type heat treatment method. CONSTITUTION: After the pad oxide layer is formed on the entire surface of a silicon wafer by using the RTA equipment, a pad nitride layer is formed on the resultant structure. A photoresist layer is applied to the entire surface of the pad nitride layer. After an exposure and development process is performed to form a photoresist layer pattern, the pad nitride layer and the pad oxide layer are etched to form an active region and an isolation region by using the photoresist layer pattern as an etch mask. 본 발명은 반도체 소자의 제조 공정 중 소자분리막 형성 시, 증착되는 패드산화막 형성방법에 관한 것으로, 기존의 패드산화막을 형성하던 퍼니스 타입(Furnace Type)의 열처리 방법 대신 급속 열처리(Rapid Thermal Annealing) 장비를 이용하여 패드산화막을 형성함으로써, 실리콘 웨이퍼 내에 소자 특성 균일도를 증가시킬 수 있을 뿐만 아니라 게터링 효율도 증가 시켜 반도체소자의 리프레쉬 특성을 향상시킬 수 있는 기술이다.