METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
PURPOSE: A method for fabricating a semiconductor device is provided to control a hot carrier effect, a gate induced drain leakage(GIDL) phenomenon and degradation of a leakage current characteristic by performing a furnace annealing process on the semiconductor device after a rapid thermal annealin...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A method for fabricating a semiconductor device is provided to control a hot carrier effect, a gate induced drain leakage(GIDL) phenomenon and degradation of a leakage current characteristic by performing a furnace annealing process on the semiconductor device after a rapid thermal annealing(RTA) process is performed at least once. CONSTITUTION: A gate insulation layer(23) and a gate electrode(24) are formed on a semiconductor substrate(21). Impurity ions are implanted into the semiconductor substrate by using the gate electrode as a mask. The impurities are activated to form a source/drain by using an RTA process. An annealing process is performed on the semiconductor substrate having the source/drain in a furnace. The annealing process in the furnace is performed at a temperature of 600-800 deg.C.
본 발명은 반도체장치의 제조 공정 중 열적으로 유기되는 스트레스 또는 기계적으로 유기되는 스트레스로 인한 핫캐리어 효과, GIDL 및 접합누설 특성의 저하를 억제하도록 한 반도체장치의 제조 방법을 제공하기 위한 것으로, 이를 위한 본 발명은 적어도 1회 이상의 급속열처리 공정이 이루어진 반도체장치를 600℃∼800℃에서 노열처리하는 단계를 포함한다. |
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