METHOD FOR PLANARIZING SEMICONDUCTOR DEVICE

PURPOSE: A method for planarizing a semiconductor device is provided to prevent a loss of a mask nitride layer of a word line, by minimizing excessive polishing of a self-aligned contact region in a chemical mechanical polishing(CMP)process. CONSTITUTION: An interlayer dielectric(130) is formed on a...

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Bibliographische Detailangaben
Hauptverfasser: KIM, GU YEONG, SON, GI GEUN
Format: Patent
Sprache:eng ; kor
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Zusammenfassung:PURPOSE: A method for planarizing a semiconductor device is provided to prevent a loss of a mask nitride layer of a word line, by minimizing excessive polishing of a self-aligned contact region in a chemical mechanical polishing(CMP)process. CONSTITUTION: An interlayer dielectric(130) is formed on a semiconductor substrate(100) having the word line(110). After a buffer layer is applied, ions having large atomic weight are implanted to break the lattice of the interlayer dielectric. The buffer layer is removed. After a plug mask of a T-type is formed, the interlayer dielectric is etched to form a self-aligned contact. After a plug formation layer(170) is formed on the resultant structure having the self-aligned contact, a CMP process is performed.