Method for wire bonding in semiconductor package

PURPOSE: A wire bonding method of a semiconductor package is provided to make the semiconductor package thin and to control a process defect like wire sagging or wire sweeping, not by forming a loop height on a bond pad, but by performing a stitch bonding process. CONSTITUTION: A ball bump(104) is f...

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Bibliographische Detailangaben
Hauptverfasser: CHO, GYEONG JE, LEE, YEON YEONG, PARK, BYEONG GYU
Format: Patent
Sprache:eng ; kor
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Beschreibung
Zusammenfassung:PURPOSE: A wire bonding method of a semiconductor package is provided to make the semiconductor package thin and to control a process defect like wire sagging or wire sweeping, not by forming a loop height on a bond pad, but by performing a stitch bonding process. CONSTITUTION: A ball bump(104) is formed on the bond pad(122) of an integrated circuit chip(120) by a capillary on which a wire(106) is mounted. The capillary having the ball bump cuts the wire. The capillary moves to an inner lead(132) of a lead frame corresponding to the bond pad of the integrated circuit chip to perform a ball bonding process. The capillary forms the loop height. The capillary performs the stitch bonding process while moving to the ball bump. The above mentioned processes are repeated regarding another bond pad of the integrated circuit chip and another inner lead of the lead frame. 낮은 루프 하이트를 실현함으로써 반도체 패키지의 두께를 줄이며, 와이어 스위핑 및 볼 단락(ball short)를 방지할 수 있는 반도체 패키지의 와이어 본딩방법에 관해 개시한다. 이를 위해 본 발명은, 집적회로 칩의 본드패드에 먼저 볼 범프를 형성한 후, 리드프레임의 인너리드에는 볼 본딩을하고, 상기 볼 범프가 있는 칩의 본드패드에 스티치 본딩을 수행한다.