SEMICONDUCTOR INTEGRATED CIRCUIT MEMORY DEVICE WHICH CAN OPERATE IN OTHER TEST MODES

PURPOSE: A semiconductor integrated circuit memory device is provided, which can operate in various test modes, and can reduce a test time. CONSTITUTION: The semiconductor memory device includes a memory cell array divided into at least two banks comprising array blocks of memory cells storing data bit information and being arranged in columns and rows. A read circuit reads test data from the selected bank, and a parallel test circuit(200) determines whether the test data has the same logic level in response to control signals during a wafer/package test operation mode. And a parallel test control circuit(180) generates the control signals in response to a wafer test flag signal, a package test flag signal and a bank active signal. An address indicating bank selection information is activated by one of the wafer test flag signal and the package test flag signal during the wafer/package test operation mode. And only a part of the array blocks of each of the selected banks is activated when the bank active signal is activated during the wafer test package mode.