METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
PURPOSE: A method for fabricating a semiconductor device is provided to prevent a malfunction of a transistor by forming uniformly an oxide layer at a side of a gate electrode. CONSTITUTION: The first and the second conductive layers and the first insulating layer are formed on a semiconductor subst...
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| creator | AHN, JEONG SU CHOI, JIN O PARK, JE SEONG YANG, CHANG JIP |
| description | PURPOSE: A method for fabricating a semiconductor device is provided to prevent a malfunction of a transistor by forming uniformly an oxide layer at a side of a gate electrode. CONSTITUTION: The first and the second conductive layers and the first insulating layer are formed on a semiconductor substrate(30). The first insulating layer and the second and the first conductive layers are etched selectively by using a mixing gas. A gate electrode(58) including the first insulating pattern,(53) the second conductive layer pattern(52), and the first conductive layer pattern(51) is formed by the etching process. A recess(60) is formed at a side of the gate electrode(58) by performing an over-etching process for the second conductive layer. A high temperature oxide is deposited on the semiconductor substrate in order to a high temperature oxide layer(62). The second insulating layer is formed thereon. A spacer and a gate protection layer are formed at a side of the gate electrode(58) by etching the second insulating layer and the high temperature oxide layer. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20010093416A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20010093416A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20010093416A3</originalsourceid><addsrcrecordid>eNrjZND2dQ3x8HdRcPMPUnBzdArydHYM8fRzVwh29fV09vdzCXUOAcq4uIZ5OrvyMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JJ47yAjAwNDAwNLYxNDM0dj4lQBAAEHJbM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD FOR FABRICATING SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>AHN, JEONG SU ; CHOI, JIN O ; PARK, JE SEONG ; YANG, CHANG JIP</creator><creatorcontrib>AHN, JEONG SU ; CHOI, JIN O ; PARK, JE SEONG ; YANG, CHANG JIP</creatorcontrib><description>PURPOSE: A method for fabricating a semiconductor device is provided to prevent a malfunction of a transistor by forming uniformly an oxide layer at a side of a gate electrode. CONSTITUTION: The first and the second conductive layers and the first insulating layer are formed on a semiconductor substrate(30). The first insulating layer and the second and the first conductive layers are etched selectively by using a mixing gas. A gate electrode(58) including the first insulating pattern,(53) the second conductive layer pattern(52), and the first conductive layer pattern(51) is formed by the etching process. A recess(60) is formed at a side of the gate electrode(58) by performing an over-etching process for the second conductive layer. A high temperature oxide is deposited on the semiconductor substrate in order to a high temperature oxide layer(62). The second insulating layer is formed thereon. A spacer and a gate protection layer are formed at a side of the gate electrode(58) by etching the second insulating layer and the high temperature oxide layer.</description><edition>7</edition><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2001</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20011029&DB=EPODOC&CC=KR&NR=20010093416A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20011029&DB=EPODOC&CC=KR&NR=20010093416A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AHN, JEONG SU</creatorcontrib><creatorcontrib>CHOI, JIN O</creatorcontrib><creatorcontrib>PARK, JE SEONG</creatorcontrib><creatorcontrib>YANG, CHANG JIP</creatorcontrib><title>METHOD FOR FABRICATING SEMICONDUCTOR DEVICE</title><description>PURPOSE: A method for fabricating a semiconductor device is provided to prevent a malfunction of a transistor by forming uniformly an oxide layer at a side of a gate electrode. CONSTITUTION: The first and the second conductive layers and the first insulating layer are formed on a semiconductor substrate(30). The first insulating layer and the second and the first conductive layers are etched selectively by using a mixing gas. A gate electrode(58) including the first insulating pattern,(53) the second conductive layer pattern(52), and the first conductive layer pattern(51) is formed by the etching process. A recess(60) is formed at a side of the gate electrode(58) by performing an over-etching process for the second conductive layer. A high temperature oxide is deposited on the semiconductor substrate in order to a high temperature oxide layer(62). The second insulating layer is formed thereon. A spacer and a gate protection layer are formed at a side of the gate electrode(58) by etching the second insulating layer and the high temperature oxide layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2001</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND2dQ3x8HdRcPMPUnBzdArydHYM8fRzVwh29fV09vdzCXUOAcq4uIZ5OrvyMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JJ47yAjAwNDAwNLYxNDM0dj4lQBAAEHJbM</recordid><startdate>20011029</startdate><enddate>20011029</enddate><creator>AHN, JEONG SU</creator><creator>CHOI, JIN O</creator><creator>PARK, JE SEONG</creator><creator>YANG, CHANG JIP</creator><scope>EVB</scope></search><sort><creationdate>20011029</creationdate><title>METHOD FOR FABRICATING SEMICONDUCTOR DEVICE</title><author>AHN, JEONG SU ; CHOI, JIN O ; PARK, JE SEONG ; YANG, CHANG JIP</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20010093416A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2001</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>AHN, JEONG SU</creatorcontrib><creatorcontrib>CHOI, JIN O</creatorcontrib><creatorcontrib>PARK, JE SEONG</creatorcontrib><creatorcontrib>YANG, CHANG JIP</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AHN, JEONG SU</au><au>CHOI, JIN O</au><au>PARK, JE SEONG</au><au>YANG, CHANG JIP</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR FABRICATING SEMICONDUCTOR DEVICE</title><date>2001-10-29</date><risdate>2001</risdate><abstract>PURPOSE: A method for fabricating a semiconductor device is provided to prevent a malfunction of a transistor by forming uniformly an oxide layer at a side of a gate electrode. CONSTITUTION: The first and the second conductive layers and the first insulating layer are formed on a semiconductor substrate(30). The first insulating layer and the second and the first conductive layers are etched selectively by using a mixing gas. A gate electrode(58) including the first insulating pattern,(53) the second conductive layer pattern(52), and the first conductive layer pattern(51) is formed by the etching process. A recess(60) is formed at a side of the gate electrode(58) by performing an over-etching process for the second conductive layer. A high temperature oxide is deposited on the semiconductor substrate in order to a high temperature oxide layer(62). The second insulating layer is formed thereon. A spacer and a gate protection layer are formed at a side of the gate electrode(58) by etching the second insulating layer and the high temperature oxide layer.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE |
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