METHOD AND STRUCTURE OF COLUMN INTERCONNECT

METHOD AND STRUCTURE OF COLUMN INTERCONNECT

PURPOSE: A method and structure of column interconnection are provided to improve adhesive strength between the last metal layer and a dielectric adjacent to it. CONSTITUTION: A semiconductor chip includes a last metallic layer(LD,11) and a second last metallic layer(LM-1,13), a conductive via(12) c...

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Hauptverfasser: BERGMAN-REUTER BETTE L, FEENEY PAUL M, PREVITI-KELLY ROSEMARY A, STAMPER ANTHONY K, ELLIS-MONAGHAN JOHN J, GEFFKEN ROBERT M, LANDIS HOWARD S, RUTTEN MATTHEW J, YANKEE SALLY J
Format: Patent
Sprache:eng ; kor
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:PURPOSE: A method and structure of column interconnection are provided to improve adhesive strength between the last metal layer and a dielectric adjacent to it. CONSTITUTION: A semiconductor chip includes a last metallic layer(LD,11) and a second last metallic layer(LM-1,13), a conductive via(12) connected with two metal layers(11,13), an interlayer dielectric(14). A support structure includes a protection cap(10) on the interlayer dielectric(14) by a CVD. The thickness of the cap is about 1-20 micrometer. The support structure includes a patterned metal layer insulated by a rigid dielectric. 복수개의 상호접속 금속층과, 상호접속 금속 위의 적어도 하나의 변형가능한 유전체 물질과, 적어도 하나의 입력/출력 접합 패드와, 패드를 지지하는 실질적으로 단단한 유전체를 포함하며 변형가능한 유전체 물질의 파쇄를 방지하는 지지 구조물을 포함하는 반도체 칩의 구조 및 방법이 제공된다.