DIFFUSION PREVENTING BARRIER LAYER IN INTEGRATED CIRCUIT INTER-METAL LAYER DIELECTRICS
PURPOSE: A diffusion preventing barrier layer in integrated circuit inter-metal layer dielectrics is provided to reduce an inter-line capacitance, and to prevent an impurity from causing a destructive reaction with a conductive element present in the next layer of a multi-layer integrated circuit st...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A diffusion preventing barrier layer in integrated circuit inter-metal layer dielectrics is provided to reduce an inter-line capacitance, and to prevent an impurity from causing a destructive reaction with a conductive element present in the next layer of a multi-layer integrated circuit structure. CONSTITUTION: A cap layer or barrier layer which prevents an impurity from moving in a low permittivity material prevents the impurity from causing a destructive reaction with a conductive element present in the next layer of a multi-layer integrated circuit structure. A diffusion preventive barrier layer is deposited between a first dielectrics layer and a conductive layer above the integrated circuit. The diffusion-preventive barrier layer is the next metal layer which is formed, on the spot, at the dielectrics layer comprising impurity, and further, a process including polishing is performed with a multi-layer dielectrics structure. The on-the-spot deposition at the cap layer or barrier layer prevents a layer comprising impurities from being exposed to an atmosphere, and the cap layer or barrier layer prevents the layer from being contaminated with water content, hydrogen, etc. |
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