METHOD FOR MANUFACTURING CELL TRANSISTOR OF DYNAMIC RANDOM ACCESS MEMORY

PURPOSE: A method for manufacturing a cell transistor is provided to control a leakage current and to improve a refresh characteristic, by forming a nitride layer sidewall not contacting a source/drain while using a step difference of an oxide layer pattern. CONSTITUTION: A gate oxide layer(3) and the first polycrystalline silicon layer are sequentially deposited on a substrate(1), and the first oxide layer pattern of which an upper central portion of the gate oxide layer is relatively thick is formed on the first polycrystalline silicon layer. A source/drain(6) is formed in a side surface of a region of which the oxide layer is relatively thick, by an ion implantation process using the step of the first oxide layer pattern. A nitride layer sidewall is a side surface of a region of which the first oxide layer pattern is relatively thick. The first oxide layer pattern located in a side surface of the nitride layer sidewall and having a relatively thin thickness and the gate oxide layer are etched to expose a part of the source/drain by a photolithography process. An oxide layer is deposited and patterned on the entire structure to form the second oxide layer pattern located on the source/drain. The first and second oxide layer patterns are selectively eliminated to expose the polycrystalline silicon layer and the source/drain. A polycrystalline silicon layer is deposited on the resultant structure, and is patterned to simultaneously form a gate oxide located on the exposed polycrystalline silicon and a plug(10) located on the source/drain.