METHOD FOR MANUFACTURING INTEGRATED CIRCUIT HAVING SHALLOW TRENCH INSULATION REGION

PURPOSE: To form a planarized shallow trench insulation region, without the use of chemical and mechanical polishing by removing a part of an insulation layer formed on a material layer to expose a part of a trench insulation layer, and then removing the insulation layer on the material layer using...

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Bibliographische Detailangaben
Hauptverfasser: GIBSON JR. GERALD W, ABDELGADIR MAHJOUB ALI, GUNTER STEVEN GREGORY, MAURY ALVARO
Format: Patent
Sprache:eng ; kor
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Zusammenfassung:PURPOSE: To form a planarized shallow trench insulation region, without the use of chemical and mechanical polishing by removing a part of an insulation layer formed on a material layer to expose a part of a trench insulation layer, and then removing the insulation layer on the material layer using a life-off process. CONSTITUTION: A pad oxide layer 105 is formed between a material layer 110 and a substrate 100, and after a trench is formed by etching, an insulation layer 130 is formed on the material layer 110 and in the trench. The material and deposition process of the insulation layer 130 are selected to form a thin region 135. When the material layer 110 of SiN is etched, using hot phosphoric acid after a region 125 of the material layer 110 is exposed by removing the thin region 135, an insulation region 140 above the pad oxide has a step height in the range of 200-1,000 Å and the insulation region 140 has an overall thickness X5 in the range of 3,500-4,000 Å. According to the method, a planarized shallow trench insulation region can be formed, without using chemical and mechanical polishing.