BALL-GRID-ARRAY TYPE MULTI CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF

PURPOSE: A method for manufacturing a ball-grid-array(BGA) type multi chip package is to provide a chip-size-package(CSP) level multi chip package, by eliminating a structural limit in stacking semiconductor chips, and by reducing the package in thickness. CONSTITUTION: An upper semiconductor chip(1...

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Hauptverfasser: JANG, HYEONG CHAN, SONG, YEONG JAE
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SONG, YEONG JAE
description PURPOSE: A method for manufacturing a ball-grid-array(BGA) type multi chip package is to provide a chip-size-package(CSP) level multi chip package, by eliminating a structural limit in stacking semiconductor chips, and by reducing the package in thickness. CONSTITUTION: An upper semiconductor chip(130) has an active surface with a plurality of electrode terminals(132) wherein the electrode terminals are disposed towards an edge of the active surface. A lower semiconductor chip(120) has an active surface having a plurality of electrode terminals(122). A circuit board is prepared which includes a base film(143), a window(144), a wire pattern and a penetration hole(142). An upper surface of the circuit board is adhered to the active surface of the lower semiconductor chip by a buffering adhesive(160). The electrode terminal of the lower semiconductor chip is electrically connected to a beam lead of the circuit board. The electrode terminal of the lower semiconductor chip and the beam lead portion are encapsulated with encapsulating resin(171). The electrode terminal of the upper semiconductor chip and the board pads of the circuit board are electrically bonded by a bonding wire(131). The upper and lower semiconductor chips and bonding wire are encapsulated with encapsulating resin. An external connection terminal(180) is protruded from a metal pad(145) to a lower surface of the base film through the penetration hole of the circuit board.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20000074340A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20000074340A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20000074340A3</originalsourceid><addsrcrecordid>eNqNyr0KwjAUQOEsDqK-wwXnQLEF52v-bZKGSzJ0KkXiJFqo748IPoBn-ZazZdcLes8NOcmRCEfIY1IQis8OhHUJEooejQKMEhACxqJR5EIuGggq20FCtorUoPdsc58faz383LGjVllYXpfXVNdlvtVnfU89nZpv567tGmz_uz7Zki3C</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>BALL-GRID-ARRAY TYPE MULTI CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF</title><source>esp@cenet</source><creator>JANG, HYEONG CHAN ; SONG, YEONG JAE</creator><creatorcontrib>JANG, HYEONG CHAN ; SONG, YEONG JAE</creatorcontrib><description>PURPOSE: A method for manufacturing a ball-grid-array(BGA) type multi chip package is to provide a chip-size-package(CSP) level multi chip package, by eliminating a structural limit in stacking semiconductor chips, and by reducing the package in thickness. CONSTITUTION: An upper semiconductor chip(130) has an active surface with a plurality of electrode terminals(132) wherein the electrode terminals are disposed towards an edge of the active surface. A lower semiconductor chip(120) has an active surface having a plurality of electrode terminals(122). A circuit board is prepared which includes a base film(143), a window(144), a wire pattern and a penetration hole(142). An upper surface of the circuit board is adhered to the active surface of the lower semiconductor chip by a buffering adhesive(160). The electrode terminal of the lower semiconductor chip is electrically connected to a beam lead of the circuit board. The electrode terminal of the lower semiconductor chip and the beam lead portion are encapsulated with encapsulating resin(171). The electrode terminal of the upper semiconductor chip and the board pads of the circuit board are electrically bonded by a bonding wire(131). The upper and lower semiconductor chips and bonding wire are encapsulated with encapsulating resin. An external connection terminal(180) is protruded from a metal pad(145) to a lower surface of the base film through the penetration hole of the circuit board.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20001215&amp;DB=EPODOC&amp;CC=KR&amp;NR=20000074340A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20001215&amp;DB=EPODOC&amp;CC=KR&amp;NR=20000074340A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JANG, HYEONG CHAN</creatorcontrib><creatorcontrib>SONG, YEONG JAE</creatorcontrib><title>BALL-GRID-ARRAY TYPE MULTI CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF</title><description>PURPOSE: A method for manufacturing a ball-grid-array(BGA) type multi chip package is to provide a chip-size-package(CSP) level multi chip package, by eliminating a structural limit in stacking semiconductor chips, and by reducing the package in thickness. CONSTITUTION: An upper semiconductor chip(130) has an active surface with a plurality of electrode terminals(132) wherein the electrode terminals are disposed towards an edge of the active surface. A lower semiconductor chip(120) has an active surface having a plurality of electrode terminals(122). A circuit board is prepared which includes a base film(143), a window(144), a wire pattern and a penetration hole(142). An upper surface of the circuit board is adhered to the active surface of the lower semiconductor chip by a buffering adhesive(160). The electrode terminal of the lower semiconductor chip is electrically connected to a beam lead of the circuit board. The electrode terminal of the lower semiconductor chip and the beam lead portion are encapsulated with encapsulating resin(171). The electrode terminal of the upper semiconductor chip and the board pads of the circuit board are electrically bonded by a bonding wire(131). The upper and lower semiconductor chips and bonding wire are encapsulated with encapsulating resin. An external connection terminal(180) is protruded from a metal pad(145) to a lower surface of the base film through the penetration hole of the circuit board.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyr0KwjAUQOEsDqK-wwXnQLEF52v-bZKGSzJ0KkXiJFqo748IPoBn-ZazZdcLes8NOcmRCEfIY1IQis8OhHUJEooejQKMEhACxqJR5EIuGggq20FCtorUoPdsc58faz383LGjVllYXpfXVNdlvtVnfU89nZpv567tGmz_uz7Zki3C</recordid><startdate>20001215</startdate><enddate>20001215</enddate><creator>JANG, HYEONG CHAN</creator><creator>SONG, YEONG JAE</creator><scope>EVB</scope></search><sort><creationdate>20001215</creationdate><title>BALL-GRID-ARRAY TYPE MULTI CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF</title><author>JANG, HYEONG CHAN ; SONG, YEONG JAE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20000074340A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>JANG, HYEONG CHAN</creatorcontrib><creatorcontrib>SONG, YEONG JAE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JANG, HYEONG CHAN</au><au>SONG, YEONG JAE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>BALL-GRID-ARRAY TYPE MULTI CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF</title><date>2000-12-15</date><risdate>2000</risdate><abstract>PURPOSE: A method for manufacturing a ball-grid-array(BGA) type multi chip package is to provide a chip-size-package(CSP) level multi chip package, by eliminating a structural limit in stacking semiconductor chips, and by reducing the package in thickness. CONSTITUTION: An upper semiconductor chip(130) has an active surface with a plurality of electrode terminals(132) wherein the electrode terminals are disposed towards an edge of the active surface. A lower semiconductor chip(120) has an active surface having a plurality of electrode terminals(122). A circuit board is prepared which includes a base film(143), a window(144), a wire pattern and a penetration hole(142). An upper surface of the circuit board is adhered to the active surface of the lower semiconductor chip by a buffering adhesive(160). The electrode terminal of the lower semiconductor chip is electrically connected to a beam lead of the circuit board. The electrode terminal of the lower semiconductor chip and the beam lead portion are encapsulated with encapsulating resin(171). The electrode terminal of the upper semiconductor chip and the board pads of the circuit board are electrically bonded by a bonding wire(131). The upper and lower semiconductor chips and bonding wire are encapsulated with encapsulating resin. An external connection terminal(180) is protruded from a metal pad(145) to a lower surface of the base film through the penetration hole of the circuit board.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title BALL-GRID-ARRAY TYPE MULTI CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-05T16%3A58%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JANG,%20HYEONG%20CHAN&rft.date=2000-12-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20000074340A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true