STRUCTURE AND METHOD FOR ARRANGING FUSE OF SEMICONDUCTOR DEVICE
PURPOSE: A structure for arranging a fuse of a semiconductor device is provided to easily guarantee an optimum fuse pattern having a desired line width and a length used in a next generation semiconductor device, by cutting the fuse with a fuse cutting apparatus, and by checking if the fuse is cut b...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE: A structure for arranging a fuse of a semiconductor device is provided to easily guarantee an optimum fuse pattern having a desired line width and a length used in a next generation semiconductor device, by cutting the fuse with a fuse cutting apparatus, and by checking if the fuse is cut by a current flow. CONSTITUTION: A structure for arranging a fuse of a semiconductor device comprises a semiconductor wafer, a plurality of first fuses(F1,F3,F5,F7,F9) and a plurality of second fuses(F2,F4,F6,F8,F10). The plurality of first fuses are disposed in parallel in a desired region of the semiconductor wafer, and are electrically series-connected between a first pad(11) and a second pad(12). The first fuses are not cut by a laser beam. The plurality of second fuses are alternatively disposed in parallel with respective first fuses in a desired region of the semiconductor wafer, and are electrically parallel-connected between a third pad(13) and a fourth pad(14). The second fuses are cut by a laser beam. |
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