DUTY RATE CORRECTOR

PURPOSE: A duty rate corrector is provided to appropriate in low voltage source, to embody in simple construction and to cut down design area of circuit and electric power consumption. CONSTITUTION: A duty rate corrector is composed of a first input port(301), a second input port(302) and CMOS logic gate(303). A first signal(Vin1) having a prescribed duty rate is inputted to the first input port(301). A second signal(Vin2) delayed 180°phase in comparison with the first signal(Vin1) is inputted to the second input port(302). The CMOS logic gate(303) is triggered by rising edge of the first signal(Vin1) and generates an output signal(Vout) in high level. Also, the CMOS logic gate(303) is triggered by rising edge of the second signal(Vin2) and generates the output signal(Vout) in low level. Accordingly, the CMOS logic gate(303) always generates the output signal(Vout) having 50% duty rate through an output port(304), because it performs precharge and discharge operation between 180°phase regardless of duty rate of the first and second signal(Vin1, Vin2).