METHOD AND APPARATUS FOR CORRECTING MULTILEVEL CELL MEMORY BY USING ERROR LOCATING CODES
PURPOSE: A method and system is provided to collect errors using error locating codes in data words read at a multi-level cell storing three or more electric charge states. CONSTITUTION: A method and system for correcting multilevel cell memory uses error locating codes for correcting errors in a da...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE: A method and system is provided to collect errors using error locating codes in data words read at a multi-level cell storing three or more electric charge states. CONSTITUTION: A method and system for correcting multilevel cell memory uses error locating codes for correcting errors in a data word. The error locating code determines a bit block, which includes the error but does not identify if the bit has the error. The error locating code may identify the multi-level cell having errors because the bit block corresponds to one or more multi-level cells. The multi-level cell having errors is corrected to have more electric charges and then the error locating code determines whether the multi-level cell is corrected or not. |
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