FABRICATION METHOD OF SEMICONDUCTOR MEMORY DEVICE
PURPOSE: A method for fabricating a semiconductor memory device is provided to improve characteristic of the device. CONSTITUTION: After isolation layers for defining active regions are formed in a semiconductor substrate, a plug oxide layer is formed on a semiconductor substrate and partly removed....
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A method for fabricating a semiconductor memory device is provided to improve characteristic of the device. CONSTITUTION: After isolation layers for defining active regions are formed in a semiconductor substrate, a plug oxide layer is formed on a semiconductor substrate and partly removed. Next, source/drain regions are selectively formed in the substrate by implantation of impurities through the patterned plug oxide layer. Then, a plug material such as doped polysilicon is deposited, polished, and subsequently the plug oxide layer is removed, so that a patterned plug layer is formed on the source/drain regions. Next, after side walls such as nitride are formed on sides of the plug layer, a gate oxide layer, a gate material such as polysilicon, and a gate cap layer such as tungsten silicide are successively formed on the substrate and the plug layer. By polishing all layers on the substrate, gate electrodes(30) are obtained between the patterned plug layers.
본 발명은 게이트 및 스토리지 노드 콘택 형성을 달리하여 소자의 특성을 향상시킬 수 있도록한 반도체 메모리 소자의 제조 방법에 관한 것으로,반도체 기판의 전면에 플러그 산화막층을 형성하고 선택적으로 제거하는 단계;상기 패터닝된 플러그 산화막층이 식각되어진 부분이 매립되도록 플러그 형성 물질층을 증착하고 평탄화하여 플러그층을 형성하는 단계;상기 플러그 산화막층을 제거하고 플러그 측면에 측벽을 형성하고 전면에 게이트 산화막을 형성하는 단계;상기 게이트 산화막상에 게이트 형성 물질층,게이트 캡층을 차례로 형성하고 상기 적층 형성된 물질층들을 측벽의 일부가 노출될때까지 전체적으로 식각하여 게이트 전극을 형성하는 단계를 포함하여 이루어진다. |
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