TRENCH ISOLATING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUITS
PURPOSE: A trench isolating method is provided to prevent a formation of recessed groove formed at edge portion of the isolation layer by using a flowable oxide pattern as isolating insulator. CONSTITUTION: The method comprises the steps of forming a trench by etching a semiconductor substrate(11) u...
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| Format: | Patent |
| Sprache: | eng ; kor |
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| Zusammenfassung: | PURPOSE: A trench isolating method is provided to prevent a formation of recessed groove formed at edge portion of the isolation layer by using a flowable oxide pattern as isolating insulator. CONSTITUTION: The method comprises the steps of forming a trench by etching a semiconductor substrate(11) using a mask pattern(18); growing a thermal oxide(19) to recover the damaged substrate(11) at sidewalls and bottom portion of the trench; filling a flowable oxide pattern(21a) into the trench; removing the mask pattern(18) using wet-etchant and simultaneous deforming the flowable oxide pattern(21a) to a deformed flowable oxide pattern(21b) having a recessed groove formed at edge portion(B) thereof; and annealing the deformed flowable oxide pattern(21b), thereby forming an isolating oxide pattern(21c) covered the recessed groove.
본 발명은 반도체 집적회로의 트렌치 소자분리 방법에 관한 것으로, 트렌치 영역을 채우는 소자분리용 절연체막을 흐름성 산화막(flowable oxide)으로 형성하고, 활성영역 상에 형성된 마스크 패턴을 습식 식각공정으로 제거한 후에 소자분리용 절연체막인 흐름성 산화막을 리플로우시키어 소자분리막을 형성함으로써, 소자분리막의 가장자리에 리세스된 홈이 형성되는 것을 방지할 수 있다. |
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