UNDERFILL METHOD AND UNDERFILL APPARATUS OF SEMICONDUCTOR PACKAGE

The present invention relates to an underfill method and device of a semiconductor package. The underfill method of a semiconductor package according to the present invention comprises: a step of loading a substrate; a step of electrically charging a filling agent to be filled between the substrate...

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Bibliographische Detailangaben
Hauptverfasser:	JANG YONG HEE, BYEON, DO YEONG, NGUYEN VUDAT
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	The present invention relates to an underfill method and device of a semiconductor package. The underfill method of a semiconductor package according to the present invention comprises: a step of loading a substrate; a step of electrically charging a filling agent to be filled between the substrate and an element; a step of applying the filling agent to the substrate; and a step of forming an electric filed in the applied filling agent. According to the present invention, filling efficiency can be improved by controlling wettability of the filling agent. 본 발명은 반도체 패키지의 언더필 방법 및 장치에 관한 것으로서, 본 발명에 따른 반도체 패키지의 언더필 방법은 기판을 로딩하는 단계, 상기 기판과 소자 사이에 충진되는 충진제를 하전시키는 단계, 상기 충진제를 상기 기판에 도포하는 단계; 및 도포된 상기 충진제에 전기장을 형성하는 단계를 포함하는 것을 특징으로 한다.