FREQUENCY SYNTHESIZER
The present invention relates to a broadband frequency synthesizer having high resolution, low phase noise and excellent spurious signal characteristics. According to an embodiment of the present invention, a frequency synthesizer includes: a fixed local oscillation circuit for a clock signal having...
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Sprache: | eng ; kor |
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Zusammenfassung: | The present invention relates to a broadband frequency synthesizer having high resolution, low phase noise and excellent spurious signal characteristics. According to an embodiment of the present invention, a frequency synthesizer includes: a fixed local oscillation circuit for a clock signal having a fixed frequency, and outputting a local oscillation signal having a fixed frequency; a variable reference frequency oscillation circuit for receiving a clock signal of the fixed local oscillation circuit and a local oscillation signal to output a variable reference frequency; a variable frequency oscillation circuit for receiving a voltage of a loop filter or a digital-to-analog converter (DAC) to output a variable frequency; a multiplication and phase comparison circuit for multiplying the variable reference frequency and comparing a phase of the multiplied variable reference frequency with a phase of the variable frequency of the variable frequency oscillation circuit by using an analog phase comparator; and a phase lock implementation circuit for adjusting a variable frequency of the variable frequency oscillation circuit by adjusting a voltage of the digital-to-analog converter (DAC) and implementing a phase lock of the variable frequency oscillation circuit based on the voltages of the compared phases.
본 발명은, 고해상도, 저위상 잡음과 우수한 불요신호(spurious signal) 특성을 갖는 광대역 주파수합성기에 관한 것으로서, 본 발명의 실시예에 따른 주파수합성기는, 고정된 주파수를 갖는 클럭신호와 고정된 주파수를 갖는 국부발진신호를 출력하는 고정국부발진회로와, 상기 고정국부발진회로의 클럭신호와 국부발진신호를 입력받아 가변기준주파수를 출력하는 가변기준주파수발진회로와, 루프필터 또는 DAC(Digital to Analog Convertor)의 전압을 입력받아 가변주파수를 출력하는 가변주파수 발진회로와, 상기 가변기준주파수를 체배 후, 그 체배된 가변기준주파수의 위상과 가변주파수 발진회로의 가변주파수의 위상을 아날로그 위상비교기를 이용하여 비교하는 체배 및 위상비교회로와, 상기 DAC(Digital Analog Convertor)의 전압을 조절하여 상기 가변주파수 발진회로의 가변주파수를 조절하고, 상기 비교된 위상의 전압을 근거로 가변주파수 발진회로의 위상잠금을 구현하는 위상잠금구현회로를 포함할 수 있다. |
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