METHOD FOR SUBSTRATE BONDING OF IC CHIP
According to an embodiment of the present invention, a substrate bonding method of an integrated circuit chip comprises the following steps of: loading an integrated circuit chip in a chamber wherein an anisotropy conductive film is attached to the entire bonding surface having a patterned connectio...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | According to an embodiment of the present invention, a substrate bonding method of an integrated circuit chip comprises the following steps of: loading an integrated circuit chip in a chamber wherein an anisotropy conductive film is attached to the entire bonding surface having a patterned connection terminal pattern formed thereon in the integrated circuit chip; loading a circuit board having a line pattern formed therein in the chamber; aligning the connection terminal pattern of the integrated circuit chip to be matched with the line pattern; and bonding the bonding surface to the circuit board having the line pattern aligned to the connection terminal pattern wherein the anisotropy conductive film is attached to the bonding surface. Therefore, the method provides a unit which enables the integrated circuit chip to have an efficient bonding feature and a high conductive feature when the integrated circuit chip is bonded.
본 발명의 실시 형태는 패터닝된 접속 단자 패턴이 형성된 접합면의 전체에 이방성 도전 필름이 부착된 집적회로 칩이 챔버에 로딩되는 과정; 라인 패턴이 형성된 회로기판을 챔버에 로딩시키는 과정; 상기 집적회로 칩의 접속 단자 패턴이 회로기판의 라인 패턴과 일치하도록 정렬시키는 과정; 및 상기 이방성 도전 필름이 부착된 접합면을 접속 단자 패턴에 정렬된 라인 패턴을 가지는 회로기판에 접합시키는 과정;을 포함할 수 있다. |
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