SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME

SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor package and a method for preparing the semiconductor package are provided to improve the confidence of package of a semiconductor by suppressing expansion of a packaging material with low modulus by using a packaging material with high modulus. A semiconductor package(100) comprises...

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Hauptverfasser: BYUN, HYUNG JIK, JUNG, SO YOUNG
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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JUNG, SO YOUNG
description A semiconductor package and a method for preparing the semiconductor package are provided to improve the confidence of package of a semiconductor by suppressing expansion of a packaging material with low modulus by using a packaging material with high modulus. A semiconductor package(100) comprises a semiconductor chip(110); a substrate(120) where the semiconductor chip is adhered; a wire(130) which connects electrically the semiconductor chip and the substrate; an external contact terminal which connects electrically the semiconductor chip and the outside; and a packaging material(136) which packages the wire and its surroundings and comprises a plurality of insulating materials(132, 134) of different physical properties. Preferably the plurality of insulating materials has different modulus.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR100766498BB1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR100766498BB1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR100766498BB13</originalsourceid><addsrcrecordid>eNrjZLAOdvX1dPb3cwl1DvEPUghwdPZ2dHdVcPRzUfB1DfHwd1FwAwr7OvqFujk6h4QGefq5K4R4uCoEO_q68jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gQwMDczMzE0sLJydDY-JUAQB4fCo5</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>BYUN, HYUNG JIK ; JUNG, SO YOUNG</creator><creatorcontrib>BYUN, HYUNG JIK ; JUNG, SO YOUNG</creatorcontrib><description>A semiconductor package and a method for preparing the semiconductor package are provided to improve the confidence of package of a semiconductor by suppressing expansion of a packaging material with low modulus by using a packaging material with high modulus. A semiconductor package(100) comprises a semiconductor chip(110); a substrate(120) where the semiconductor chip is adhered; a wire(130) which connects electrically the semiconductor chip and the substrate; an external contact terminal which connects electrically the semiconductor chip and the outside; and a packaging material(136) which packages the wire and its surroundings and comprises a plurality of insulating materials(132, 134) of different physical properties. Preferably the plurality of insulating materials has different modulus.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20071015&amp;DB=EPODOC&amp;CC=KR&amp;NR=100766498B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20071015&amp;DB=EPODOC&amp;CC=KR&amp;NR=100766498B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BYUN, HYUNG JIK</creatorcontrib><creatorcontrib>JUNG, SO YOUNG</creatorcontrib><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><description>A semiconductor package and a method for preparing the semiconductor package are provided to improve the confidence of package of a semiconductor by suppressing expansion of a packaging material with low modulus by using a packaging material with high modulus. A semiconductor package(100) comprises a semiconductor chip(110); a substrate(120) where the semiconductor chip is adhered; a wire(130) which connects electrically the semiconductor chip and the substrate; an external contact terminal which connects electrically the semiconductor chip and the outside; and a packaging material(136) which packages the wire and its surroundings and comprises a plurality of insulating materials(132, 134) of different physical properties. Preferably the plurality of insulating materials has different modulus.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAOdvX1dPb3cwl1DvEPUghwdPZ2dHdVcPRzUfB1DfHwd1FwAwr7OvqFujk6h4QGefq5K4R4uCoEO_q68jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gQwMDczMzE0sLJydDY-JUAQB4fCo5</recordid><startdate>20071015</startdate><enddate>20071015</enddate><creator>BYUN, HYUNG JIK</creator><creator>JUNG, SO YOUNG</creator><scope>EVB</scope></search><sort><creationdate>20071015</creationdate><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><author>BYUN, HYUNG JIK ; JUNG, SO YOUNG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR100766498BB13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BYUN, HYUNG JIK</creatorcontrib><creatorcontrib>JUNG, SO YOUNG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BYUN, HYUNG JIK</au><au>JUNG, SO YOUNG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><date>2007-10-15</date><risdate>2007</risdate><abstract>A semiconductor package and a method for preparing the semiconductor package are provided to improve the confidence of package of a semiconductor by suppressing expansion of a packaging material with low modulus by using a packaging material with high modulus. A semiconductor package(100) comprises a semiconductor chip(110); a substrate(120) where the semiconductor chip is adhered; a wire(130) which connects electrically the semiconductor chip and the substrate; an external contact terminal which connects electrically the semiconductor chip and the outside; and a packaging material(136) which packages the wire and its surroundings and comprises a plurality of insulating materials(132, 134) of different physical properties. Preferably the plurality of insulating materials has different modulus.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T00%3A09%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BYUN,%20HYUNG%20JIK&rft.date=2007-10-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR100766498BB1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true