A PACKAGE STRIP FORMAT AND ITS ARRAY

A strip format of a package substrate and its array are provided to arrange more strip formats and to improve efficiency of an assembly process by forming a concave section and a convex section for reducing an interval between strip formats. A semiconductor device is mounted on a strip format(100) o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SHIM, KYU HYUN, HWANG, KYU IL, CHOI, BONG KYU, KIM, WON HEE, KANG, TAE HYEOG, YOUM, KWANG SEOP
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A strip format of a package substrate and its array are provided to arrange more strip formats and to improve efficiency of an assembly process by forming a concave section and a convex section for reducing an interval between strip formats. A semiconductor device is mounted on a strip format(100) of a semiconductor package substrate. The strip format includes a package region(110) where an outer circuit pattern is formed and a dummy region(120) surrounding the package region. A concave section(140) and a convex section(130) are formed on the dummy region. The concave section and the convex section are engaged with a dummy region of another strip format to reduce an interval between strip formats. The concave section is oriented to the outside of the strip format to have an extended width. The convex section is oriented to the outside of the strip format to have a reduced width.