PREPARATION METHOD FOR A CAP WAFER USING A SOI WAFER, FABRICATING MATHOD FOR A SEMICONDUCTOR CHIP USING THE CAP WAFER AND THE SEMICONDUCTOR CHIP FABRICATED BY THE SAME METHOD

A cap wafer manufacturing method, a semiconductor chip manufacturing method using a cap wafer and a semiconductor chip thereby are provided to simplify manufacturing processes and to reduce fabrication costs by acquiring easily through holes using an SOI wafer. An SOI wafer comprises an upper silicon layer(210), an insulating layer(220) and a lower silicon layer(230). A plurality of through holes(240) are formed on the resultant structure by etching selectively the upper silicon layer. The plurality of through holes are used for exposing the insulating layer to the outside. A plating process is performed on the through holes. The thickness of the upper silicon layer is in a predetermined range of 40 to 50 mum.