PD LIMITING CIRCUIT FOR MOTOR DRIVER IC
PURPOSE: A Pd limiting circuit is provided to protect a transistor by limiting Pd of a power transistor and achieve improved smoothness of operation of motor driver by reducing heat. CONSTITUTION: A Pd limiting circuit comprises a first transistor(Q1) and a second transistor(Q2) constituted by a cur...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | PURPOSE: A Pd limiting circuit is provided to protect a transistor by limiting Pd of a power transistor and achieve improved smoothness of operation of motor driver by reducing heat. CONSTITUTION: A Pd limiting circuit comprises a first transistor(Q1) and a second transistor(Q2) constituted by a current mirror; a third transistor(Q3) and a fourth transistor(Q4) having current paths connected between the second transistor and a ground voltage(GND), and which response to a first power voltage(VCC); a fifth transistor(Q5) having a current path connected between the first transistor and a second power voltage(VSS); a sixth transistor(Q6) having a current path connected between a first node(Nd1) and the second power voltage; a seventh transistor(Q7) having a current path connected between the first node and the second power voltage, and which responses to the signal of the first node; a tenth transistor(Q10) and an eleventh transistor(Q11) constituted by a current mirror, and provided with the first power voltage; a twelfth transistor(Q12) having a current path connected between the first power voltage and a second node(Nd2), and which responses to the switching signals of the tenth and eleventh transistors; a thirteenth transistor(Q13) having a current path connected between the first power voltage and a predetermined input terminal, and which responses to the switching signal of the tenth and eleventh transistors; a fourteenth transistor(Q14) having a current path connected between the first power voltage and a third node(Nd3), and which responses to the output signal of the thirteenth transistor; an invert diode(D3) for connecting the collector terminal and emitter terminal of the fourteenth transistor; and a fifteenth transistor(Q15) having a current path connected between the second node and the second power voltage, and which responses to the signal of the first node.
본 발명은 모터 드라이브 아이시의 Pd 제한 회로에 관한 것으로서, 특히 모터의 회전방향 변환시에 발생하는 비정상적인 동작하에서의 파워 트랜지스터의 Pd 증가를 제한하는 회로를 구비함으로서, 트랜지스터를 보호하고 열 발생을 감소시켜 모터 드라이브 동작을 원활하게 한 Pd 제한 회로에 관한 것이다. |
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