TRENCH MANUFACTURING METHOD FOR ISOLATION SEMICONDUCTOR DEVICE
PURPOSE: A trench isolation method is provided to reduce manufacturing costs, to improve efficiency and throughput by using a liner oxide instead of a nitride layer and a pad oxide. CONSTITUTION: A photoresist is deposited directly on a silicon wafer without forming a pad oxide and a nitride layer,...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE: A trench isolation method is provided to reduce manufacturing costs, to improve efficiency and throughput by using a liner oxide instead of a nitride layer and a pad oxide. CONSTITUTION: A photoresist is deposited directly on a silicon wafer without forming a pad oxide and a nitride layer, and then a trench is formed by etching the silicon wafer in a desired depth using the PR pattern as a mask. A liner oxide is formed on the entire surface of the resultant structure using a thermal oxidation. The is filled by depositing an using, and simultaneously the is heavily deposited in an active area. The liner is remained only in the using etching processes, CMP(chemical-mechanical polish) and cleaning process. |
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